In complementary metal oxide semiconductor (CMOS) power amplifier design, there are two main issues: (1) voltage stress reduction for power amplifier's reliability and (2) linearity improvement. The voltage stress of a device can lead to oxide breakdown and hot carrier effects, and can increase the threshold voltage and degrade the performance of the device. Also, CMOS technology has an inherent linearity problem because of a number of parasitic capacitances. Accordingly, there is a need for feedback biasing for cascode amplifier.